Simulate Translate Test

VTRAN/TetraMAX Interoperability Flow

Joint Solution

The interoperability flow between Synopsys' TetraMAX and Source III's vtran with optional test interfaces allow for quick and easy translation of ATPG-generated test vector data to many popular device test program formats, as well as simulation testbench formats. Translations support signal timing and scan data mapping. In addition to this flow for translating TetraMAX WGL & STIL files to test programs, vtran's new Read-Back canned readers provide for a way to verify the test programs directly be translating them back to a Verilog or VHDL testbench for re-simulation prior to loading on a tester.

chart synopsys

Translating TetraMAX Vector Files Using VTRAN

For a typical TetraMAX run, the result is a large WGL or STIL file often containing one or more scan chains and potentially several timing sets. These files may contain thousands, or millions, of vectors with many scan chain data load/unload operations. Translating these vector files into a test program for one of the popular device testers can be a formidable task. Vtran has been developed to specifically deal with this problem and makes the translation process very simple and straightforward.

When creating a WGL file under TetraMAX, the following parameter settings are recommended if vtran is to be used to translate the file to one of the supported tester (or testbench) formats:

set wgl -bidi_map -x -x

set wgl -bidi_map z- z-

set wgl -bidi_map 0x 0x

set wgl -bidi_map 1x 1x

set wgl -bidi_map xx xx

set wgl -bidi_map z0 z0

set wgl -bidi_map z1 z1

set wgl -bidi_map zx zx

set wgl -bidi_map zz zz

set wgl -chain_list shift

set wgl -group_bidis

set wgl -inversion_reference master

set wgl -last_scan

set wgl -nomacro

set wgl -nopad

set wgl -pre_measured

set wgl -scan_map dash

These settings are applicable to TetraMAX version 2.02 and later. They result in a WGL file that is consistent with the WGL syntax specification, which vtran requires. Also, refer to the On-Line Help facility of TetraMAX concerning vtran settings.

For information and examples of vtran command files that can be used to translate WGL and STIL files produced by TetraMAX to various testers and simulation testbenches, please also see the Application Notes page.

Product Support

Customer Quotes

  • We currently use VTRAN for translating WGL, EVCD and VCD vectors to be used on various Verigy and Teradyne platforms. Their feature set has allowed us to perform vector manipulation instead of writing Perl scripts. Their support has been very responsive and they are open to additional features on future releases.
  • Source III VTRAN® tool has been very efficient to translate VCD, WGL, and STIL vectors to Teradyne UFLEX and Verigy 93000 ATE formats. Their response to add or implement new features as per customer needs is impeccable and steadfast. I would highly recommend using this tool to any test engineer for vector conversion
  • Sanera Utilizes Full Featured VTRAN® to Convert Functional and ATPG Vectors "We chose VTRAN® because it can handle multiple simulation file formats (including VCD and WGL) from a single tool. VTRAN's commands are easy to use. The flexibility in pin mapping, masking outputs, and generating scan-based vectors proves to be tremendously helpful. And most of all, Source III provides excellent, fast response to our support needs. This helps us to get things moving very quickly - making good solid progress." Ken ChenTest Engineering Manager
  • We use VTRAN® to translate WGL or TDL vectors to Teradyne J750 and Flex format. The produced patterns work fine and adaptation to a new device pinout can be done easy and quickly.
  • Intrinsix Uses VTRAN® to Speed Vector Translation Flow "I had one customer who used VHDL for RTL, Verilog for gate level simulation, and sometimes used EPIC tools. Getting vectors into the various formats was a nightmare. VTRAN® made the translation process easy and seamless. Plus, WGL or STIL for the test group. Support from Source III has also been quite impressive. In one case, they wrote a bug fix for me in under a day." John Weiland Intrinsix Consultant  
  • VTRAN® is currently our tool of choice for converting MS digital test patterns between various logic simulation formats and WGL/STIL. Our experience with Source III has been positive and their support is extremely responsive and timely.
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