Simulate Translate Test

Masking Pins in Target Vector File

This Application Note focuses on the MASK_PINS feature of the VTRAN command file. The MASK_PINS command can be used to override (mask) the signal states defined in the Original Vector File (OVF). This command can be applied both to input and output signals, and to both the input and output data of a bidirectional signal. Pin states can be masked within each cycle, or in multiple vectors within a time range, or when specified masking conditions are met. Common applications include masking output signals at times in the cycle they are not in a stable state and functional test program debug. There are several mechanisms to define when and how a signal should be masked. These provide both flexibility and power to the user. They will be explained in this document.

VTRAN® Overview

The VTRAN translation process is divided into three separate tasks or blocks, which correspond to the three blocks in the VTRAN command file - the OVF_BLOCK, the PROC_BLOCK and the TVF_BLOCK. The commands and parameters in these blocks direct the details of the translation. In general, the OVF_BLOCK contains information necessary for VTRAN to read the input file or "Original Vector File". The PROC_BLOC contains commands that tell VTRAN the data processing functions to be performed on the original data. At a minimum these functions will usually include state mapping. Other functions such as cyclization, bidirectional data control considerations, adding pins, inserting statements, and modifying the timing of state transitions are dependent on the needs of the particular translation. The MASK_PINS command is a part of the PROC_BLOCK and is applicable (in some form) to all types of translations. Finally, the TVF_BLOCK contains commands that specify the desired output format. Commands related to post processing or optional user-supplied parameters appear in this block.

Using the MASK_PINS Command in VTRAN®

The MASK_PINS Feature

There are many different ways to specify the condition under which an OVF signal state should be overridden (masked):

  • vector time range
  • compound logic expressions
  • signal state transitions
  • active timeset
  • state sequences on OVF vectors
  • a combination of criteria

These different ways are reflected in the various syntax forms of the MASK_PINS command.

  
  MASK_PINS [MASK_CHARACTER=mask_value,] pin_list @ [NOT] time, time [-CYCLE];

or

  MASK_PINS [MASK_CHARACTER=mask_value,] pin_list @ [NOT] CONDITION compound_logic_expression;

or

  MASK_PINS [MASK_CHARACTER=mask_value,] pin_list @ [NOT] TRANSITION state->state
    	[,start_cycle] [,end_cycle] [,-RETRIGGER];

or

  MASK_PINS [MASK_CHARACTER=mask_value,] pin_list
    @ [NOT] CONTROL_TRANSITION ctl_pin state->state [,start_cycle] [,end_cycle]
    [,-RETRIGGER];

or

  MASK_PINS [MASK_CHARACTER=mask_value,] pin_list @ [NOT] TIMESET 

or

  MASK_PINS pin_list @ SEQUENCE input_sequence, output_sequence;

or

  MASK_PINS pin_list @ SEQUENCE_BLOCK input_sequence, output_sequence;

Additional criteria can be optionally be appended to each MASK_PINS form.

  [: START=t1, STOP=t2, WHEN logic_expr] ;

Some forms of the MASK_PINS command are more applicable to some VTRAN flows than others. The recommended usage is shown in the table below.

Multiple MASK_PINS commands are allowed, even when they operate on the same pins. The MASK_PINS feature is applied before state translations (STATE_TRANS) occur and after the application of SCALE, TIME_OFFSET, and CYCLIZATION commands. Any state characters/timeset references included in the MASK_PINS qualifying condition need to be from the set of state characters returned by the OVF reader/cyclization, i.e. a "from" state in STATE_TRANS. This "from" set of state characters varies by translation type and input format. Time references need to be chosen assuming SCALE and TIME_OFFSET timestamp updates. See the "Considerations" section for more information on this.

Any signal state modified by the MASK_PINS command will be subject to potential further modification when the state translations are applied.

The Pin List

In all forms, the pin_list field is required. It is a comma-separated list of one or more signal and/or group names. The pin_list may also include pins added by VTRAN's ADD_PIN command.

Specifying the Mask Character

Except in the case of mask by SEQUENCE/SEQUENCE_BLOCK, the MASK_PINS command supports an optional MASK_CHARACTER field. This specifies the state to be assigned to the signals in the pin_list when the specified TIME, CONDITION, TRANSITION, or TIMESET criteria is satisfied. The default value for the mask character is 'X'. This can be overridden in one of two ways.

In the first case, the state to be used for masking is specified. The single-quote marks enclosing this constant state character are optional. Examples are:

  
  MASK_PINS MASK_CHARACTER=Z outpin1...

  MASK_PINS MASK_CHARACTER='Z' outpin1...

In the second case, the state of another signal, at the time the masking condition is met, is used for the mask character. The signal name is enclosed in double-quotes. If the signal name is preceded by a tilde character ("~"), the inverse of the signal's state is used for the mask character. The tilde appears inside the double-quote marks surrounding the signal name. Examples are:

  
  MASK_PINS MASK_CHARACTER="other_pin" outpin1...

  MASK_PINS MASK_CHARACTER="~other_pin" outpin1...

NOT

An optional NOT keyword before the masking condition is defined. When used, the signals in the pin_list will be masked when the masking condition is not satisfied; they will retain their states from the OVF when the masking condition is satisfied. This is useful if it is more straightforward to describe when the pin_list should not be masked, than to describe when it should be masked.

Masking on Bidirectional Signals

The MASK_PINS feature can be applied both to input signals and to output signals. When it is used with bidirectional signals, the input side of the signal is referred to with the signal name, while the output side of the signal is referred to with the signal name followed by the suffix ".O". As an example, the signal name sig1 refers to the input side of a bidirectional signal, and sig1.O refers to the output side of the same signal. An example for a bidirectional bus pin would be bus[1] and bus.O[1] as the input and output versions respectively.

MASK_PINS By Time

When a time range is used to specify the controlling condition for a MASK_PINS command, it either refers to an absolute time range or to a relative time range applicable to all cycles. The absolute time range is the default; the relative time range is selected with the -CYCLE flag.

For an absolute time range, the masking condition starts at the first time of the time range in the OVF vectors, and ends at the second time of the time range.

For a relative time range, the masking condition starts at the first time of the time range within every cycle and ends at the second time of the time range within a cycle. The VTRAN CYCLE command should be used to define the cycle length. If not defined, 100ns is the default cycle length. This control type is applicable to print-on-change TVF formats, only.

The time values are specified in units of nanoseconds.

Examples

  mask_pins outputs @ 0,2000;

Here, all output signals are masked during initialization. The state of each output signal is set to X (the default mask character) for the first 2000 nanoseconds of the test.

  mask_pins mask_character=W jj @ 400, 435 -cycle;

The state of the signal jj is set to W from 400ns to 435ns in each cycle.

  mask_pins k @ NOT 990, 995 -cycle;

The state of k is set to X (the default mask character) everywhere in the cycle except for between 990 and 995.

MASK_PINS By Condition

The conditions under which a signal should be masked might be dependent on the state of the device. In this case, a "compound logic expression" can be used to specify the device state that determines when the signal should be masked. Compound logic expressions can include the operators OR (|), AND (&), and NOT (~). They are evaluated left-to-right, unless overridden by parentheses. The operands of a compound logic expression are pin names and states. By default, the state for a pin is its value in the current vector, at the time the expression is being evaluated. The user can specify the pin's state from a later or earlier vector for use in the expression evaluation by using an optional vector offset. This is accomplished by following the pin name with (+/-n), where n is the number of vectors following or preceding the current vector.

Examples

  MASK_PINS bidir1.O @ CONDITION ~(out1 = H);

The signal bidir1.O is the output data for bidirectional signal bidir1. Its state is set to X (the default mask character) for each vector in which the state of signal out1 is anything other than H.

  mask_pins mask_character=R InSig1 @ NOT CONDITION (InData[1]=1)&(InData[0]=0);

The signal InSig1 retains its state from the OVF for all vectors in which the state of signal InData[1] is logic 1 and the state of signal InData[0] is logic 0. For all other vectors, the state of InSig1 is set to R.

  mask_pins mask_character=R InSig1 @ CONDITION (InData[1](-2)=1)&(InData[0](4)=0);

The state of signal InSig1 is set to R for all vectors in which the state of signal InData[1] is logic 1 two vectors earlier and the state of signal InData[0] is logic 0 four vectors later.

  mask_pins MASK_CHARACTER='1' ClkA @ condition ClkA=0;

The state of signal ClkA is set to 1 for all vectors in which its state is logic 0.

  mask_pins OutSig1 @ CONDITION (pin1=1) & ((pin2(-3)=0) | (pin3(+2)=Z))

OutSig1 is set to X when pin1 is a logic 1 in the current vector, pin2 was a logic 0 three vectors ago and pin3 will be a logic Z two vectors from now.

MASK_PINS By Transition

There are times when the state of a given signal is unstable, around the time of a transition on that signal or a different signal. The TRANSITION control type of the MASK_PINS command can be used to mask the signal's state during the unstable region. The mask region can be defined to span cycles, before, after, and during the defining transition. Prop delays are one application for this control.

The TRANSITION keyword is used to specify masking conditions based on transitions on the signal itself. The CONTROL_TRANSITION keyword is used when transitions on a different signal are used to define the masking condition for the signals in the pin_list.

This MASK_PINS type is recommended for translations where the target format (TVF) is cycle based, i.e. WGL, STIL, ATE, etc....

The asterisk character ("*") can be used as a shorthand, to refer to any state. It can be used on either side of the arrow, or on both sides. The transition *->1 defines a transition from any state to logic 1. The transition 0->* defines a transition from logic 0 to any state. The transition *->* defines any transition.

By default, the masking of the signals in the pin_list applies to the current cycle in which the masking condition is satisfied. The optional start_cycle and end_cycle parameters specify that the masking should occur in all cycles in a range. The range is defined relative to that current cycle. Both start_cycle and end_cycle can be (+ or -) any integer number, but the value of start_cycle must be less than or equal to the value of end_cycle. The default value of both is 0 (referring to current cycle).

By default, if the controlling transition occurs again while the pin is being masked within a range of cycles, the masking terminates at the end of the range. Effectively, this controlling transition is ignored. The RETRIGGER option allows the masking to be "retriggered" in this situation: the presence of a controlling transition within the range of masked cycles adjusts the end of masking. The new end cycle is calculated as though the new transition marks the beginning of masking. This retriggering can happen multiple times following an initial transition.

The masking retriggers only if the -RETRIGGER flag is present. It is selectable on a per-command basis. Within a given VTRAN command file, some MASK_PINS commands can be retriggerable, while others are not.

Examples

The following examples demonstrate MASK_PINS by TRANSITION or CONTROL_TRANSITION.

  mask_pins OutSig1 @ transition *->*;

The signal OutSig1 is masked each time it changes state. In each cycle in which a transition occurs on OutSig1 in the OVF, its state is set to X (the default mask character) in the TVF.

  
  mask_pins mask_character=Q OutData @ NOT TRANSITION 0->1, -1, 1;

This example defines the conditions under which the signal OutData should retain its state (not be masked). When OutData changes state from logic 0 to logic 1, its state in that cycle, the previous cycle, and the following cycle will be the value from the OVF. In all other cycles, the state of OutData is set to Q.

  mask_pins mask_character=Q OutData @ TRANSITION 0->1, -3, +2;

The state of signal OutData is set to Q in the TVF, each time its state changes from logic 0 to logic 1. In addition, its state is set to Q for the 3 cycles preceding the transition and for the 2 cycles following the transition.

  mask_pins mask_character=Q OutData @ TRANSITION 0->1, 2, 3;

Each time the state of signal OutData changes from logic 0 to logic 1, its state is set to Q in the TVF for the second and third cycles following the transition.

  mask_pins AD0.O, AD1.O, AD2.O, AD3.O @ transition *->*;

This example shows a comma-separated list of signals to be masked. All the signals in the list represent the output data for bidirectional signals. For each cycle in which any of the signals changes state, the state of that signal is set to X (the default mask character). Each signal is examined individually and transitions on it only cause it to be masked, not the others in the list.

Examples for MASK_PINS by CONTROL_TRANSITION are similar except that the transition of a control pin determines whether or not masking occurs.

  mask_pins mask_character=Q OutData @ NOT control_TRANSITION InData[1] 1->0, -1, 1;

This example defines the conditions under which the signal OutData should retain its state (not be masked), in terms of transitions on the signal InData[1]. When InData[1] changes state from logic 1 to logic 0, the state of OutData in that cycle, the previous cycle, and the following cycle will be the value from the OVF. In all other cycles, the state of OutData is set to Q.

  mask_pins mask_character=Q OutData @ control_TRANSITION InData[1] 1->0, -5, -3;

Each time the state of signal InData[1] changes from logic 1 to logic 0, the state of OutData is set to Q in the TVF for the fifth, fourth, and third cycles preceding the transition.

  mask_pins AD0.O, AD1.O, AD2.O, AD3.O @ control_transition OEN 1->0;

This example shows a comma-separated list of signals to be masked. All the signals in the list represent the output data for bidirectional signals. For each cycle the signal OEN changes state from logic 1 to logic 0, the state of all the signals in the list is set to X (the default mask character). This masks the output data when the bidirectional signal transitions from Z to driving.

  mask_pins OutData @ CONTROL_TRANSITION ctlSig 0->1, -1, +5, -RETRIGGER;

The state of signal OutData is set to X in the TVF, each time the state of signal ctlSig changes from logic 0 to logic 1. In addition, its state is set to X for the first cycle preceding the transition and for the 5 cycles following the transition. A transition by ctlSig from logic 0 to logic 1 within the 5 cycles following the transition will continue the masking of OutData for 5 cycles beyond the later transition.

MASK_PINS By Timeset

This mode is applicable only to cycle-based TVF formats. The specified pins will be masked in all cycles that use the specified timeset, unless the "NOT" keyword is present. With "NOT", the specified pins will be masked in all cycles that use a different timeset. The timeset name must match one from the OVF_FILE.

  mask_pins mask_character=0 bidir_inputs @ TIMESET scan_tp ;

Here all the state on all bidir_inputs is set to 0 whenever the scan_tp timeset is active.

MASK_PINS By Sequence

The masking condition selected by the SEQUENCE/SEQUENCE_BLOCK keyword is based on a signal's state values in a sequence of vectors from the OVF. When the defined input_sequence is found on a set of consecutive vectors, the state characters, beginning with the first one in the sequence are replaced by the corresponding output_sequence states until all of those in the output_sequence are used up. The number of states in the output_sequence need not match the number of states in the input_sequence.

The SEQUENCE/SEQUENCE_BLOCK control type is applicable only to cycle-based TVF formats. If the OVF is a print-on-change format, one of the VTRAN cyclization features (e.g., ALIGN_TO_CYCLE, Template Cyclization) needs to be used with the MASK_PINS command. Since the cyclization process precedes the application of MASK_PINS commands, the vectors compared to the input_sequence and replaced by the output_sequence are cycle-based vectors, not print-on-change vectors.

The difference between SEQUENCE and SEQUENCE_BLOCK is in the way the vectors are traversed. In both cases, the comparison of vectors to the input_sequence is done for each sequence in the stream of input vectors and the first comparison is to the set of vectors starting with the first vector. When the SEQUENCE command is used, the next comparison is to the set of vectors starting with the second vector, regardless of whether the first comparison was a match. The masking condition is evaluated this way until the last sequence of vectors has been compared to the input_sequence. Thus, when the masking condition has been satisfied for one set of vectors, the next comparison will include modified (masked) signal states. When the SEQUENCE_BLOCK command is used, however, and the first comparison is a match, the next comparison is to the set of vectors beginning one vector after the last character of the replacement sequence.

Examples

The following example demonstrates the SEQUENCE control type.

  
  mask_pins InData[1] @ SEQUENCE "HHHLLL", "HHXXLL";

  mask_pins InData[0] @ SEQUENCE "1111100000", "1111100110";

In the above example, the state values of signal InData[1] are modified for each set of 5 consecutive vectors in which the states from the OVF are HHHLLL states. The HHHLLL sequence of states is replaced with HHXXLL. The state values of signal InData[0] are modified for each set of 10 consecutive vectors in which the states from the OVF are 1111100000 states. This sequence of states is replaced with 1111100110.

  ADD_PIN MASK_CTRL = 1;
  MASK_PINS MASK_CTRL @SEQUENCE "1111", "0111";

results in a pattern state sequence of mostly 0's.

  ADD_PIN MASK_CTRL = 1;
  MASK_PINS MASK_CTRL @SEQUENCE_BLOCK "1111", "0111";

results in a pattern state sequence 0111011101110111...

Combining Criteria Using START, STOP, and WHEN

START, STOP and WHEN criteria are independent, additional criteria that can be appended to all of the MASK_PINS forms shown above. One or all can be used. See the following examples:

MASK_PINS OutSig @ TIMESET ts1 : WHEN InSig=1;

The state values on OutSig are overridden with 'X' values when the active timeset is "ts1" and when the state of InSig is '1'.

MASK_PINS MASK_CHARACTER=X edgeSig @ CONTROL_TRANSITION nrzSig U->D : 
        START = 1600, STOP= 10000 WHEN bidirSig=D ;

 

Product Support

Customer Quotes

  • We currently use VTRAN for translating WGL, EVCD and VCD vectors to be used on various Verigy and Teradyne platforms. Their feature set has allowed us to perform vector manipulation instead of writing Perl scripts. Their support has been very responsive and they are open to additional features on future releases.
  • Intrinsix Uses VTRAN® to Speed Vector Translation Flow "I had one customer who used VHDL for RTL, Verilog for gate level simulation, and sometimes used EPIC tools. Getting vectors into the various formats was a nightmare. VTRAN® made the translation process easy and seamless. Plus, WGL or STIL for the test group. Support from Source III has also been quite impressive. In one case, they wrote a bug fix for me in under a day." John Weiland Intrinsix Consultant  
  • Source III VTRAN® tool has been very efficient to translate VCD, WGL, and STIL vectors to Teradyne UFLEX and Verigy 93000 ATE formats. Their response to add or implement new features as per customer needs is impeccable and steadfast. I would highly recommend using this tool to any test engineer for vector conversion
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  • We use VTRAN® to translate WGL or TDL vectors to Teradyne J750 and Flex format. The produced patterns work fine and adaptation to a new device pinout can be done easy and quickly.
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