Simulate Translate Test

VTRAN COMPRESSION for 93K Target Vector Files

Vector loop and repeat structures can help conserve the memory usage and decrease the load times of device test programs. In VTRAN®, the generation of these vector compression structures is completely controllable by the user. The purpose of this document is to describe how to use the VTRAN® commands for this task. While the concepts are applicable to all VTRAN® translations, the specific translations discussed here are for the 93K Target Vector Format from both cycle-based (STIL, WGL) and print-on-change (VCD, EVCD) Original Vector Files.

VTRAN® Overview

The user controls the VTRAN® translation process with an ASCII command file. Historically, the ASCII command file has been created using a text editor and VTRAN® has been launched from the command line. While, this continues to be an option, the VTRAN® User Interface Utility (VUI) is now available. It is a graphical user interface developed specifically for the VTRAN®, VCAP, and DFTView Tool Suite and is automatically installed with VTRAN®. Either way, the concepts and the results are the same.

The three blocks that make up the VTRAN® command file are:

  • OVF_BLOCK - The Original Vector File Block
  • PROC_BLOCK - The Process Block
  • TVF_BLOCK - The Target Vector File Block

The commands and parameters in these blocks direct the details of the translation. In general, the OVF_BLOCK tells VTRAN® how to read the input file or "Original Vector File". VTRAN®'s reader technology enables it to read almost any vector file. VTRAN® includes canned readers for many well known formats including STIL, WGL, VCD, and EVCD as well as support for user formats. The PROC_BLOCK contains commands that tell VTRAN® the data processing functions to be performed on the Original Vector File during translation. This typically includes such functions as how to map state characters between the two formats, bi-directional data control, signal masking, and cyclization commands but may also include adding pins, inserting statements, etc... Finally, the TVF_BLOCK contains commands that specify the desired output format and optional reporting parameters.

In regard to compression, Original Vector Files like STIL and WGL may already contain structural loops and repeat vectors. Commands in the OVF_BLOCK optionally expand these structures. Should the user decide to preserve these structures, commands in the TVF_BLOCK allow the user to specify compression constraints that arise from target tester hardware characteristics.

When the Original Vector File has no compression structures as is the case with print-on-change formats and flattened cycle-based formats, options in the TVF_BLOCK allow the user to specify how VTRAN® should identify repeat and loop opportunities.

VTRAN®Compression Management in VTRAN

VTRAN® Generation of Loops and Repeats on the 93K

93K ASCII Vector Files generated by VTRAN®, in the translation process, use the compression related syntax described below.

  • All 93K loop structures generated by VTRAN® use the SQPG syntax.
  • SQPG RPTV 2, 4;
    R1   base1 1011HH111111 ;
    R1   base1 0000LL011111 ;
    SQPG PADDING;
    
  • VTRAN® expresses repeat vectors using the "93K repeat factor" syntax.
  • R20  base1 0000LL011111 ;
    
  • When a repeat vector is identified as a one vector loop, it is expressed in the 93K Target Vector File using SQPG syntax.
  • SQPG RPTV 1, 20;
    R1   base1 0000LL011111 ;
    SQPG PADDING;
    
  • 93K loop structures, generated by VTRAN®, can contain repeat vectors.
  • SQPG RPTV 36, 3;
    R1   base1 0010LL010101 ;
    R8   base1 1001HH110101;
    R2   base1 0010HH010101;
    R1   base1 0111LLL10101 ;
    R1   base1 0010LL010101 ;
    R8   base1 1001HH110101;
    R2   base1 0010HH010101;
    R1   base1 0111LLL10101 ;
    R1   base1 0010LL010101 ;
    R8   base1 1001HH110101;
    R2   base1 0010HH010101;
    R1   base1 0111LLL10101 ;
    SQPG PADDING;
    
  • Nested loops are not allowed in 93K test programs generated by VTRAN®.
  • VTRAN® loop and repeat compression is unaffected when -USE_PHYSICAL_WAVEFORMS is specified in the TVF_BLOCK and XMODE is NOT active.

Print-on-Change OVF (VCD/EVCD) to 93K Translations

In translations from print-on-change formats like Verilog VCD and EVCD to 93K test programs, the Original Vector File inherently has no compression structures. All loops and repeats are generated by VTRAN® under user control by TESTER_FORMAT command options in the TVF_BLOCK. These include:

        REPEAT_THRESHOLD = "nn"         {# Enable repeat compression }
        REPEAT_THRESHOLD_INHIBIT = "nn" {# Inhibit accumulation of vectors for
                                           repeat for the first nn nanoseconds }
        MAX_REPEAT_COUNT = "nn"         {# Maximum repeat count allowed }
        LOOP_THRESHOLD = "nn"           {# Enable loop compression }
        LOOP_VECTOR_COUNT = "nn"        {# Specify loop length }
        MAX_LOOP_COUNT = "nn"           {# Maximum loop count allowed }

The Basic Translation with No Compression

The following example, shows a very simple VTRAN® command file that translates a print-on-change EVCD file to a 93K test program. The resulting Target Vector File is flat, i.e. contains no compression structures.

ovf_block
   begin
      ORIG_FILE = "tc1.evcd";
      SCRIPT_FORMAT VERILOG_VCD         {# Use canned reader }       
         DRIVE_THRESHOLD = 0
         SENSE_THRESHOLD = 0
      ;
      COMMENTS = On;                    {# Preserve comments }
   end;
proc_block
   begin
      ALIGN_TO_CYCLE                    {# Cyclization statements }
         400;
      DONT_CARE = "X";
      DISABLE_VECTOR_FILTER;
      STATE_TRANS pure_inputs 'U'->'1', 'u'->'1', 'B'->'1', 'b'->'1', 'D'->'0', 'd'->'0', 'A'->'0', 'a'->'0', 'N'->'0', '?'->'0', 'F'->'Z', 'f'->'Z';
      STATE_TRANS bidir_inputs 'U'->'1', 'u'->'1', 'B'->'1', 'b'->'1', 'D'->'0', 'd'->'0', 'A'->'0', 'a'->'0', 'N'->'0', '?'->'0', 'F'->'Z', 'f'->'Z';
      STATE_TRANS pure_outputs 'h'->'H', '1'->'H', 'A'->'H', 'c'->'H', 'l'->'L', '0'->'L', 'B'->'L', 'C'->'L', 'a'->'X', 'b'->'X', '?'->'X', 'T'->'M', 'F'->'M', 'f'->'M';
      STATE_TRANS bidir_outputs 'h'->'H', '1'->'H', 'A'->'H', 'c'->'H', 'l'->'L', '0'->'L', 'B'->'L', 'C'->'L', 'a'->'X', 'b'->'X', '?'->'X', 'T'->'M', 'F'->'M', 'f'->'M';
      CYCLE = 400;
   end;
tvf_block
   begin
      TARGET_FILE = "tc1.avc";          
      TESTER_FORMAT HP93000              {# Select 93K target format }
         DVC_FILE = "tc1.dvc"
      ;
      MERGE_BIDIRECTS  10HLMZX;
   end;
end

Note: If the OVF is a Verilog VCD file or any print-on-change file that does not allow VTRAN® to automatically determine signal direction, a declaration of the names and directions of the signals is also required. Additionally, on bidirectional signals it is necessary to use a VTRAN® process like BIDIRECT_CONTROL to specify when states represent input data or output data - usually as a logical function of a control signal.

Repeat Compression

Change only the TESTER_FORMAT command options, in the TVF_BLOCK, to specify the REPEAT_THRESHOLD option to enable VTRAN to generate repeat vector structures in the 93K Ascii Vector File. In this example, only those repeat vectors with a minimum repeat of 21 vectors are identified and expressed using "93K repeat factor" syntax.

        TESTER_FORMAT HP93000
             DVC_FILE = "tc1.dvc"
             REPEAT_THRESHOLD = "21"
        ;

Repeat Compression with Tester Constraints Applied

To limit the repeat count associated with duplicate vectors, often as a result of tester hardware constraints, use MAX_REPEAT_COUNT.

        TESTER_FORMAT HP93000
             DVC_FILE = "tc1.dvc"
             REPEAT_THRESHOLD = "21"
             MAX_REPEAT_COUNT = "1023"
        ;

Selectively Inhibit Repeat Vectors

To disable the accumulation of repeat vectors only during the time period from 0ns to "nn" ns, use REPEAT_THRESHOLD with REPEAT_THRESHOLD_INHIBIT.

        TESTER_FORMAT HP93000
             DVC_FILE = "tc1.dvc"
             REPEAT_THRESHOLD = "21"
             REPEAT_THRESHOLD_INHIBIT = "2000"
        ;

Loop Compression

To enable the generation of loops, LOOP_THRESHOLD and LOOP_VECTOR_COUNT must both be defined. In this example, VTRAN® looks for loop opportunities of length 2 and a minimum repetition of 3. Loop counts may be limited with the MAX_LOOP_COUNT option.

        TESTER_FORMAT HP93000
             LOOP_THRESHOLD = "3"
             LOOP_VECTOR_COUNT = "2"
             MAX_LOOP_COUNT = "8"
             DVC_FILE = "tc1.dvc"
        ;

A LOOP_VECTOR_COUNT equal = "1" is supported if repeat compression is not enabled. Both repeat and loop compression can be enabled in a single translation.

STIL/WGL to 93K Translations

Cyclized Original Vector Files like STIL and WGL may already contain structural loops and repeat vectors. Depending on the options selected, VTRAN® can preserve or expand (flatten) these structures. VTRAN® can also expand the original structures and regenerate compression structures using the REPEAT_THRESHOLD and LOOP_THRESHOLD commands described in the previous section. In all cases, tester constraints can be applied using MAX_REPEAT_COUNT and MAX_LOOP_COUNT.

Preserving OVF Structures

The following example, shows a very simple VTRAN command file that translates a STIL file to a 93K test program. The resulting Target Vector File reflects the loop/repeat compression contained in the Original Vector File. Note the use of the -ONE_LOOP_LEVEL option. It tells VTRAN® to flatten nested loops (loops inside of loops) to one level. This is required when the target tester format does not support nested loops.

ovf_block
   begin
      ORIG_FILE = "tc3.stil";
      TABULAR_FORMAT STIL               {# Use canned reader }
         -CYCLE                         {# Preserve cycle structure }
         -ONE_LOOP_LEVEL                {# Flatten nested loops }
      ;
   end;
proc_block
   begin
      DONT_CARE = "X";
      DISABLE_VECTOR_FILTER;
      STATE_TRANS pure_inputs 'U'->'1', 'B'->'1', 'D'->'0', 'A'->'0', 'N'->'0', '?'->'0', 'F'->'Z';
      STATE_TRANS bidir_inputs 'U'->'1', 'B'->'1', 'D'->'0', 'A'->'0', 'N'->'0', '?'->'0', 'F'->'Z';
      STATE_TRANS pure_outputs 'h'->'H', 'G'->'H', 'B'->'H', 'l'->'L', 'R'->'L', 'A'->'L', 'x'->'X', '?'->'X', 'T'->'M', 't'->'M', 'Q'->'M';
      STATE_TRANS bidir_outputs 'h'->'H', 'G'->'H', 'B'->'H', 'l'->'L', 'R'->'L', 'A'->'L', 'x'->'X', '?'->'X', 'T'->'M', 't'->'M', 'Q'->'M';
   end;
tvf_block
   begin
      TARGET_FILE = "tc3.avc";
      TESTER_FORMAT HP93000                {# Select 93K target format }
         DVC_FILE = "tc3.dvc"
      ;
      MERGE_BIDIRECTS  10HLMZX;
   end;
end

In the Original Vector File, the loops may vary in length. By default VTRAN® allocated storage handles loops that contain up to 79 vectors. If VTRAN® encounters a structural loop with more vectors than its buffer size, it will generate an error message and terminate. To increase this buffer size use the TVF_BLOCK MAX_LOOP_VECTOR_COUNT command.

tvf_block
   begin
      TARGET_FILE = "tc3.avc";
      TESTER_FORMAT HP93000
         DVC_FILE = "tc3.dvc"
      ;
      MERGE_BIDIRECTS  10HLMZX;
      MAX_LOOP_VECTOR_COUNT = "100";   {# increase loop buffer size
                                          to handle loops of length 99 }
   end;

Use the TVF_BLOCK TESTER_FORMAT command options MAX_REPEAT_COUNT and MAX_LOOP_COUNT described in the previous section to place limits on compression structures. If the repeat/loop count is exceeded, VTRAN® creates a sequence of repeat/loop vectors.

        TESTER_FORMAT HP93000
             DVC_FILE = "tc1.dvc"
             MAX_REPEAT_COUNT = "1023"
             MAX_LOOP_COUNT = "127"
        ;

Flattening the Original Vector File

Change only the TABULAR_FORMAT command options to flatten loop and repeat* structures and have only straightline vectors in the Target Vector File.

      TABULAR_FORMAT STIL
         -CYCLE
         -EXPAND_LOOPS
         -EXPAND_REPS
      ;

*Unlike WGL, STIL does not have dedicated single vector repeat compression syntax. If no EXPAND options are specified, VTRAN® translates all STIL loop structures, even those of length one, into 93K loops using Sequencer instructions. If only -EXPAND_LOOPS is specified, STIL loops of length one are translated into repeat using "93K repeat factors".

Other Compression Related Items

XMODE

Repeat structures using the "93k repeat factor" syntax is the only compression allowed by VTRAN® when XMODE is active. When XMODE is used, VTRAN® automatically expands loop structures in the Original Vector File. Repeats (preserved in the OVF or generated by VTRAN®) will appear in the target vector file using the "93K repeat factor" syntax. By default, VTRAN® forces repeat vectors to have counts which are evenly divisible by n (the XMODE parameter). The -XNOPEEL_REPEATS option disables this action.

      TABULAR_FORMAT STIL
         -CYCLE
      ;

      TESTER_FORMAT HP93000
         TIME_STAMPS = "ON"
         DVC_FILE = "tc1.dvc"
         REPEAT_THRESHOLD = "6"
         XMODE = "base1 3"
         XMODE_MAP = "tc1.map"
         -XNOPEEL_REPEATS
      ;

MERGE_FILE

Multiple input files can be specified in the OVF block using the MERGE_FILE feature. The files to be merged must all be in the same format and can be used to generate any output format supported by VTRAN®. In the first case, the original files may contain all the same signals and the merge is actually a concatenation. In the second case, the original files define a set of waveforms that will be executed in parallel and may contain all different signals or an overlap of some of the signals in some of the original files. Either way, vector compression in OVF files is expanded and VTRAN® TVF_BLOCK compression command options apply.

INSERT_REPEAT

A user can direct VTRAN® to insert a repeat op-code in the output test program at an arbitrary vector location as determined by a compound logic expression test by using the INSERT_REPEAT command in the PROC_BLOCK. It is used on flat vectors or when repeat compression has been enabled with REPEAT_THRESHOLD.* It is limited by the MAX_REPEAT_COUNT parameter.

proc_block
   begin
        .
        .
        .
        INSERT_REPEAT 25 @ TIME 9200;
        .
        .
        .
   end;

*Unexpected results can occur when INSERT_REPEAT is used with LOOP_THRESHOLD or with translations where the original vector file contains unflattened loop and repeat structures.

Comments and Compression

VTRAN® preserves OVF comments* in many target formats including 93K vector files when the "COMMENT = ON" statement is used in the OVF block. By default, comments have no affect on compression. Comments on flat vectors compressed by VTRAN® into "93K repeat factor" vectors are collected and inserted above the compression structure in the target vector file. Comments on flat vectors compressed into loops using sequencer instructions reflect the first iteration only. Comments in vectors flattened by VTRAN® are repeated on each expanded vector.

The user can cause VTRAN® to stop accumulating repeat vectors whenever a comment is encountered between vectors by using the -BREAK_ON_COMMENT command in the TVF_BLOCK TESTER_FORMAT statement.

ovf_block
   begin
      ORIG_FILE = "tc1.stil";
      TABULAR_FORMAT STIL
         -CYCLE
         -EXPAND_LOOPS
         -EXPAND_REPS
      ;
      COMMENTS = ON;
   end;
proc_block
.
.
.
.
   end;
tvf_block
   begin
      TARGET_FILE = "tc1..avc";
      TESTER_FORMAT HP93000
         TIME_STAMPS = "ON"
         REPEAT_THRESHOLD = "4"
         -BREAK_ON_COMMENTS
         DVC_FILE = "tc1.dvc"
      ;
      MERGE_BIDIRECTS  10HLMZX;
      RESOLUTION = 1.0;
   end;
end

*VTRAN® recognizes the following as comments:

  • Annotation Statements in STIL files
  • End of line comments indicated by the '#' character in WGL files
  • $comment/$end keyword blocks in VCD/EVCD files

Test Program Statistics

The CREATE_STATISTICS command in the TVF_BLOCK causes VTRAN® to accumulate and report statistics on the state and state transitions of signals in the target vector file. It can be applied to any signal in the VTRAN® translation and is useful during the test program verification process to determine the extent to which signal activity is being checked. When compression stuctures are present, be aware that:

  • In translations where VTRAN® generates the loop and repeat compression structures, compare and transition data is collected on all vectors and all iterations.
  • In translations where VTRAN® preserves OVF loop compression structures, compare and transition data is collected only once per loop regardless of loopcount.
  • In translations where VTRAN® preserves repeat compression structures, compare state statistics on outputs are collected for each count on a repeated vector.
  • In translations where VTRAN® preserves repeat compression structures, transition data on inputs and bidirectionals are counted only once on a repeated vector.

SCAN

Scan structures may optionally be preserved in addition to the OVF loop/repeat structures. The following OVF_BLOCK statement causes VTRAN® to preserve the Cycle, SCAN, loop and repeat structures contained in the Original Vector File in the translation.

      TABULAR_FORMAT STIL
         -CYCLE
         -SCAN
         -ONE_LOOP_LEVEL
      ;

In 93K translations, procedure and macro structures not associated with SCAN are always flattened by VTRAN®.

The REPEAT_THRESHOLD option in the TVF_BLOCK TESTER_FORMAT statement can be used to direct VTRAN® to generate "93K repeat factors" in the 93k target test program. The LOOP_THRESHOLD option, however, cannot be used with unflattened SCAN. If specified, the following message is generated:

Error: Flattened vectors required with LoopThreshold feature.
Scan not allowed.

 

VTRAN® Compression Option Summary

Option

Location

Usage

EXPAND_LOOPS

OVF_BLOCK TABULAR FORMAT

Flatten loops contained in the Original Vector File

EXPAND_REPS

OVF_BLOCK TABULAR FORMAT

Flatten loops contained in the Original Vector File

ONE_LOOP_LEVEL

OVF_BLOCK TABULAR FORMAT

Flatten nested loops in the Original Vector File to one level

MAX_LOOP_VECTOR_COUNT

TVF_BLOCK

Increase memory available for processing loops contained in the Original Vector File during VTRAN execution

REPEAT_THRESHOLD = “nn”

TVF_BLOCK TESTER_FORMAT

Enable VTRAN Repeat Compression. Repeat opportunities must have a minimum of “nn” vectors.

REPEAT_THRESHOLD_INHIBIT =“nn”

TVF_BLOCK TESTER_FORMAT

When VTRAN Repeat Compression is enabled, inhibit the creation of repeat structures for the first “nn” nanoseconds.

MAX_REPEAT_COUNT = “nn”

TVF_BLOCK TESTER_FORMAT

Limit the repeat count of a repeat vector in the target vector file. It is applied when VTRAN Repeat Compression is enabled and as well as when VTRAN preserves compression structures contained in the Original Vector File.

LOOP_THRESHOLD = “nn”

 

TVF_BLOCK TESTER_FORMAT

Enable VTRAN Loop Compression. Loop opportunities must have a minimum of “nn” consecutive repeats.

LOOP_VECTOR_COUNT= “nn”

TVF_BLOCK TESTER_FORMAT

When VTRAN Loop Compression is enabled, specify the number of vectors that comprise the loop.

MAX_LOOP_REPEAT_COUNT = “nn”

TVF_BLOCK TESTER_FORMAT

Limit the repeat count of loop structures in the target vector file. It is applied when VTRAN Loop Compression is enabled and as well as when VTRAN preserves compression structures contained in the Original Vector File.

Product Support

Customer Quotes

  • We currently use VTRAN for translating WGL, EVCD and VCD vectors to be used on various Verigy and Teradyne platforms. Their feature set has allowed us to perform vector manipulation instead of writing Perl scripts. Their support has been very responsive and they are open to additional features on future releases.
  • Intrinsix Uses VTRAN® to Speed Vector Translation Flow "I had one customer who used VHDL for RTL, Verilog for gate level simulation, and sometimes used EPIC tools. Getting vectors into the various formats was a nightmare. VTRAN® made the translation process easy and seamless. Plus, WGL or STIL for the test group. Support from Source III has also been quite impressive. In one case, they wrote a bug fix for me in under a day." John Weiland Intrinsix Consultant  
  • We use VTRAN® to translate WGL or TDL vectors to Teradyne J750 and Flex format. The produced patterns work fine and adaptation to a new device pinout can be done easy and quickly.
  • Source III VTRAN® tool has been very efficient to translate VCD, WGL, and STIL vectors to Teradyne UFLEX and Verigy 93000 ATE formats. Their response to add or implement new features as per customer needs is impeccable and steadfast. I would highly recommend using this tool to any test engineer for vector conversion
  • Sanera Utilizes Full Featured VTRAN® to Convert Functional and ATPG Vectors "We chose VTRAN® because it can handle multiple simulation file formats (including VCD and WGL) from a single tool. VTRAN's commands are easy to use. The flexibility in pin mapping, masking outputs, and generating scan-based vectors proves to be tremendously helpful. And most of all, Source III provides excellent, fast response to our support needs. This helps us to get things moving very quickly - making good solid progress." Ken ChenTest Engineering Manager
  • VTRAN® is currently our tool of choice for converting MS digital test patterns between various logic simulation formats and WGL/STIL. Our experience with Source III has been positive and their support is extremely responsive and timely.
  • 1
  • 2
  • 3
  • 4
  • 5
  • 6