The latest 4.6 Release of VTRAN® now includes support for reading the new IEEE Standard Test Interface Language (1450) vector files. With this improved canned reader, VTRAN® can handle translations from STIL to a variety of testers (including Teradyne, Credence, HP83000/93000 and HP-3070 PCF), ASIC formats such as TSTL2 and TDL_91, and simulator formats such as Verilog and VHDL testbenches. As tools that generate vector data begin to standardize on this new IEEE standard format, the need for a bridge to the numerous other formats accepted by today's simulation tools and testers increases. In addition to providing this bridge, VTRAN® also can be effectively used for verifying tools that generate STIL by providing a path back to simulation - essentially closing the loop. A STIL writer is also under development for release next year.