Simulate Translate Test

Our New VTRAN Technical Summary is Now Live

Monday, 08 January 2018 11:41
Since the release of VTRAN v.10.0, VTRAN and has gone through a number of different changes that continue to cement it as the most powerful vector translation tool on the market today. We’ve now updated our technical summary to reflect many of these changes, along with a new design layout and added details to help you review VTRAN with your decision makers. You can review the technical summary here: Should you have any additional questions about VTRAN, or any of the Source III Suite of products, please do not hesitate to contact our support staff today.
The traditional integrated circuit is inflexible. The rigid, silicon structure used to be an advantage for building older technologies, as they needed to be built in a way that offered better form and structure to prevent against problems. But the value of rigid circuits is limited to flat surfaces, where the firmness of the IC is an advantage. The Internet of Things (IoC) is creating a need for less rigid circuits: Circuits in Shapes Other Than Flat. Circuits that Can Change Shape if the Item Changes Shape. Luckily, research scientists are successfully creating these types of chips – microcontrollers that bend and flex without damage. Read more about these types of flexible circuits on Printed Electronics World.
  In an exciting bit of IC news, researchers at the University of Cambridge have successfully printed integrated circuits onto fabric using an inkjet printer. The idea of “wearable technology” has been around for several years. But it tends to be bulky, fragile, or unreliable. By printing the circuit directly onto fabric in a way that is malleable and not firm, wearable technology can have the same look and feel as any other apparel. It also opens the door to circuits that are placed on textiles, which may have the benefit of being more environmentally friendly and cost efficient. Read the entire interesting IC news article on
Source III’s newest release is now available. Version 10.5 has several new features, improvements upon old features, and a few bug fixes to ensure that your needs are met. You will find updates to all of our bundled products in this release, including: VTRAN 10.5 VUI 10.5 DFTView 10.5 VCAP 10.5 VGEN 10.5 The complete list of updates can be found on our individual release notes, but some of our most notable include: VTRAN: Advantest SmarTest8 target files now support WFC_Mode combined with XMODE, as well as an Xmode pad file Enhancements to signal group handling for Advantest SmarTest 7 (93000) and SmarTest8 targets. Multiple enhancements to the Advantest SmarTest8 writer. CREATE_STATISTICS operation now includes scan vector data in transition and compare counts. Significant performance improvements handling large comment blocks. Base clock is now configurable in the Palladium-targeted Verilog TestBench target format. DFTView Now supports a time offset when comparing…

VTRAN Version 10.4.2 Release Update

Monday, 30 October 2017 22:07
Source III has recently released VTRAN/VUI version 10.4.2, in an effort to continue to offer new and useful updates for all of our VTRAN users. This release offers several new tools and fixes to help you with your translation efforts. These updates include: WFC_MODE support was added to the Advantest HP93000 Reader. HP93000 avc/dvc files that contain waveform character-based timing formats can now maintain that timing when they are read using the -WFC_MODE flag. The EXPLICIT_BIDIR_INACTIVE_MODE command has been added to the VTRAN OVF_BLOCK. This command causes the VTRAN VCD/EVCD, WGL, and STIL readers to use the '-', state character, to represent the inactive state on bidirectional signals. VTRAN COMMENT_BUS and COMMENT_BUSX commands now ignore non-printable characters (ASCII values < 0x20 or > 0x7E) contained in simulation comments encoded in bus state values. The SmarTest8 Writer module has a new default for signal groups and timing groups. An option has…