Simulate Translate Test

Our support team here at Source III is dedicated to your success. We are always available to answer any questions you may have about our products, or respond to any needs you may have when they arise. When we see a particularly valuable quesiton that we believe may be relevant to the entire Source III community, we will sometimes share it here on our blog. The following is a great question asked by one of our customers:   Question:   I'm translating to a WGL file, and I'm attempting to mask the output side of a bidir bus called DATA[7:0], but it's masking the input side of the bus instead.  The original line in the (unmasked) WGL looks like this:   ... 00000000-------- ]; I then apply a mask with VTRAN with the following statement in my command file (PROC_BLOCK):   mask_pins DATA[7..0]; The resulting line in the (now masked) WGL…

Our New VTRAN Technical Summary is Now Live

Monday, 08 January 2018 11:41
Since the release of VTRAN v.10.0, VTRAN and has gone through a number of different changes that continue to cement it as the most powerful vector translation tool on the market today. We’ve now updated our technical summary to reflect many of these changes, along with a new design layout and added details to help you review VTRAN with your decision makers. You can review the technical summary here: http://sourceiii.com/files/vtran/VTRAN_Technical_Summary.pdf Should you have any additional questions about VTRAN, or any of the Source III Suite of products, please do not hesitate to contact our support staff today.
The traditional integrated circuit is inflexible. The rigid, silicon structure used to be an advantage for building older technologies, as they needed to be built in a way that offered better form and structure to prevent against problems. But the value of rigid circuits is limited to flat surfaces, where the firmness of the IC is an advantage. The Internet of Things (IoC) is creating a need for less rigid circuits: Circuits in Shapes Other Than Flat. Circuits that Can Change Shape if the Item Changes Shape. Luckily, research scientists are successfully creating these types of chips – microcontrollers that bend and flex without damage. Read more about these types of flexible circuits on Printed Electronics World.
  In an exciting bit of IC news, researchers at the University of Cambridge have successfully printed integrated circuits onto fabric using an inkjet printer. The idea of “wearable technology” has been around for several years. But it tends to be bulky, fragile, or unreliable. By printing the circuit directly onto fabric in a way that is malleable and not firm, wearable technology can have the same look and feel as any other apparel. It also opens the door to circuits that are placed on textiles, which may have the benefit of being more environmentally friendly and cost efficient. Read the entire interesting IC news article on Nature.com.
Source III’s newest release is now available. Version 10.5 has several new features, improvements upon old features, and a few bug fixes to ensure that your needs are met. You will find updates to all of our bundled products in this release, including: VTRAN 10.5 VUI 10.5 DFTView 10.5 VCAP 10.5 VGEN 10.5 The complete list of updates can be found on our individual release notes, but some of our most notable include: VTRAN: Advantest SmarTest8 target files now support WFC_Mode combined with XMODE, as well as an Xmode pad file Enhancements to signal group handling for Advantest SmarTest 7 (93000) and SmarTest8 targets. Multiple enhancements to the Advantest SmarTest8 writer. CREATE_STATISTICS operation now includes scan vector data in transition and compare counts. Significant performance improvements handling large comment blocks. Base clock is now configurable in the Palladium-targeted Verilog TestBench target format. DFTView Now supports a time offset when comparing…