WGL waveform display, Test vector translation, translate WGL vectors, WGL to ATE, WGL to test, Translate STIL vectors, STIL to ATE, STIL to test,
Simulation to test, ATPG to test, Translate VCD to ATE, VCD to test, Verilog testbench translation, WGL waveform display, STIL waveform display, and VCD waveform display.

Source III's Simulation and Test Data Management tools focus on the creation, translation and analysis for vector data used or generated by logic simulators, ATPG and ATE. Our premier product, VTRAN, links simulation/ATPG vector data to ATE and other CAE tools. VGEN provides a high-level language for quick and easy creation of simulation vector data, and VCAP performs verification/analysis of simulation data files. All Source III products are supported on Sun Solaris SPARC, Solaris X86 and Linux platforms (32 and 64-bit).

Source III was founded in 1980 to provide full custom and semicustom design services, making extensive use of gate array and standard cell design methodologies. During the first 6 years of its existence dozens of custom and semicustom design projects were completed for many large electronics companies. From here it evolved into a leading provider of CAE-to-Test software tools. It's vector file translation software (VTRAN) links logic simulation data files to vector formats either for physical device testers (ATE) or for other logic simulators and analysis tools. We support translations between more than 30 formats including:

Source III was founded in 1980 to provide full custom and semicustom design services, making extensive use of gate array and standard cell design methodologies. During the first 6 years of its existence dozens of custom and semicustom design projects were completed for many large electronics companies.

In 1986 the company was restructured to provide not only design services, but to also develop and market design tools for ASIC and system designers. The ongoing involvement of Source III in the use of CAE design tools for designing ICs resulted in the development and introduction of its first product (VGEN) in 1987. Source III found a significant weak link in the design process offered by most CAE vendors in the area of simulation stimulus generation. Initially developed for internal use, VGEN provides a powerful, simulator independent, high-level language for the stimulus generation task.

The first customer installation of the VGEN compiler occurred in late 1987 and the product has evolved substantially over the past several years. Over 1000 design engineers have used VGEN to create, manage and document logic simulation stimulus files.

In 1990, Source III introduced its second product - VTRAN, a powerful vector translation utility which enables designers to move simulation stimulus files between different logic simulators while optionally performing various timing and state modifications. This product currently provides a link between over 30 different simulation tools.

In October of 1991, VCAP, a powerful simulation data comparison and analysis program was introduced. This program is designed to meet the need for verification of simulation results data. It also performs timing analysis on simulation results files producing reports on output min/max delays and pin behavior.

VTRAN's first links between simulation data results files or ATPG-produced files and physical device testers were introduced in 1992. This software produces functional test programs for testers from simulation and ATPG-generated data files under complete user control. It supports canned readers for all popular EDA vector formats (VCD, EVCD, WGL, STIL, ...) and links to most popular testers including Verigy, Teradyne, Credence, Advantest, LTX and others. VTRAN has been used successfully by hundreds of engineers on thousands of vectors translations over the past 19 years.

Source III uses a combination of direct sales and OEM relationships to sell its products, with more emphasis on the direct sales channels. Source III currently has OEM relationships with the following companies:

Synopsys (TetraMAX™) - Writer IP / custom VTRAN

Cadence (Quickturn Design Systems) - Reader IP / custom VTRAN

We have a distributor in China. Some of the companies currently using our tools are: AMD, Broadcom, TI, Intel, Marvell, Qualcomm, ARM, NXP, Cisco Systems and many more.

The current focus of the company is providing CAE tools which aid the designer in the data-intensive aspects of design/simulation/test. This includes stimulus generation (VGEN), simulation data translation (VTRAN and test option), and simulation data verification/analysis (VCAP). All areas in which growing needs are not being met by the major CAE vendors.

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