Simulate Translate Test

About Source III

Source III's Simulation and Test Data Management tools focus on the creation, translation and analysis for vector data used or generated by logic simulators, ATPG and ATE. Our premier product, VTRAN®, links simulation/ATPG vector data to ATE and other CAE tools. VGEN® provides a high-level language for quick and easy creation of simulation vector data, and VCAP® performs verification/analysis of simulation data files. For developers/OEMs, we also recently released DFTDirect®, which provides direct access to vector data, flow information, and structural information for WGL and STIL files. All Source III products are supported on Sun Solaris SPARC, Solaris X86 and Linux platforms (32 and 64-bit).

Source III was founded in 1980 to provide full custom and semicustom design services, making extensive use of gate array and standard cell design methodologies. During the first 6 years of its existence dozens of custom and semicustom design projects were completed for many large electronics companies. From here it evolved into a leading provider of CAE-to-Test software tools. It's vector file translation software (VTRAN®) links logic simulation data files to vector formats either for physical device testers (ATE) or for other logic simulators and analysis tools. We support translations between more than 30 formats including:

From: To:
WGL Teradyne testers
STIL Credence testers
Verilog VCD & EVCD Verigy/Agilent 83000/93000
LSIM HP 3070 testers
Mentor Log IMS testers
QSIM ITS9000 testers
plus many more Advantest testers
  Verilog/VHDL Testbench
  TSTL2
  TDL_91
  WGL
  STIL
  plus many more

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